搜索资源列表
cpu-kongzhi
- 1. 实现能够执行R型、LW、SW、BEQ以及J指令的单时钟控制器,使其能够支持基本的指令。 2. 用Verilog HDL实现单时钟CPU控制器,在ISE上进行波形仿真,并在FPGA上实现。-1. Implementations can perform R-type, LW, SW, BEQ, and J instruction every clock controller, to enable them to support the basic directives. 2 single-
60seconds
- 60秒秒表设计,可暂停和分段计数等,所有功能是利用verilog HDL来描述,最后下载到CPLD/FPGA才能运行。-60 seconds stopwatch design, may be suspended and the sub-count
i8255_verilog
- 8255的Verilog hdl源代码,适合FPGA工程师使用-8255' s Verilog hdl source code for FPGA engineers
d_e_g_dds
- 基于Verilog HDL的迟早门码元同步方案中的DDS程序,已经仿真通过,可以在FPGA开发板上实现。迟-早门方式实现码元同步在无线通信中有着广泛应用。来自华中科大。-Early-later gate of Verilog HDL-based symbol synchronization scheme in the DDS program, has been through simulation, can be achieved in the FPGA development board. F
all
- 基于FPGA的频率测试器的verilog HDL代码,测试范围1-10MHz,用XILINX公司的ISE软件打开。-Based on FPGA-frequency test the Verilog HDL code, test range 1-10MHz, with XILINX ISE software to open.
VerilogHDL
- 用Verilog HDL语言编写的跑马灯小程序,可直接在FPGA上运行-With the Verilog HDL language of the Marquee applet can be run directly on the FPGA
FPGAandSOPC
- FPGA&SOPC快速入门教程(PDF),基于Verilog HDL语言,开发环境Quartus-FPGA
VerilogHDL
- Verilog HDL的开发学习教程。值得一看,学FPGA的朋友。-Verilog HDL Development Study Guide. Worth a visit, learn FPGA friends.
vgatest
- 用verilog HDL写的VGA驱动,在FPGA上实测可用(实际上是别人的劳动成果,呵呵)。-VGA driver coded in Verilog HDL. Tested.
istarVHDL
- 压缩包包含有100个VHDL的程序实例,从简单到复杂有一个渐变的过程,非常适合自学CPLD/FPGA者(使用Verilog HDL者可以不下载)-Compression bags containing 100 examples of VHDL procedures, from the simple to the complex there is a gradual process, and is ideal for learning CPLD/FPGA are (using Verilog HD
3nFJBkkt
- 基于verilog HDL语言的FPGA设计,实例,大量的-very good
decode_display
- 基于FPGA的动态数码管驱动程序,用verilog HDL语言实现。-FPGA-based digital control of dynamic drivers, using verilog HDL language.
verilogHDLmanual(Chinese)
- 这是我收集的FPGA 入门学习资料,从0开始,适合初学者。-verilog HDL manual(Chinese).
vhdl
- 基于FPGA的I2C总线模拟,采用verilog HDL语言编写-I2C-bus FPGA-based simulation using verilog HDL language
chuzhuchejifeiqi
- 利用FPGA芯片控制出租车计费系统,采用Verilog HDL编写,程序简介-Control the use of FPGA chip Taxi billing system, using Verilog HDL preparation, procedures for
I2C_Verilog
- I2C(Intel-Integrated Circuit bus)为内部IC控制的双向串行总线,用于连接微控制器及其外围设备的互连。该程序用Verilog HDL语言来实现FPGA模拟I2C协议作为主端对I2C从设备进行读/写操作。-I2C (Intel-Integrated Circuit bus) control IC for internal bi-directional serial bus for connecting micro-controller and its peripher
alarmclock
- 用verilog hdl编写的闹钟,是fpga的应用已经经过仿真,可以正常运行-alarm clock Prepared with the verilog hdl
phase_detector
- 基于FPGA的应用设计,语言采用Verilog HDL。功能是实现对光栅尺信号的相位鉴别和滤波。-FPGA-based application design, language, use of Verilog HDL. Function is to realize the grating scale signal phase identification and filtering.
fpgaverilogdesign
- 里面包含步进电机的资料,以及通过FPGA控制的Verilog HDL测序,及c测序。-Which contains information on the stepper motor and controlled by FPGA Verilog HDL sequencing, and the c sequence.
dac8552
- 使用Verilog HDL语言编写的实现DAC8552的时序程序,单片机总线与CPLD/FPGA通信,单片机负责控制送数实现功能。-Use Verilog HDL language DAC8552 realization of temporal procedures, SCM bus and CPLD/FPGA communication, SCM control to send several functions.